Supercomputing Frontiers 2015 Programme:

The conference programme is now available. If you would like to print a copy of the programme, please click on the link for the latest pdf version of the programme – SCF2015 Programme

Programme Updated on 11 March 2015.

08:00 – 08:40
Registration & Welcome Coffee

08:40 – 08:45
Opening Remarks
Marek Michalewicz, A*STAR Computational Resource Centre, Singapore
Yuefan Deng, Stony Brook University, USA & A*STAR Computational Resource Centre, Singapore

08:45 – 08:55
Welcome Address
Tin Wee Tan, Chairman, A*STAR Computational Resource Centre, Singapore

SESSION: EXASCALE & APPLICATIONS I | Chair: Marek Michalewicz

09:00 – 09:45
Exascale Arithmetic
John Gustafson, Ceranovo Inc., USA

09:45 – 10:30
Current Trends in Parallel Numerical Computing and Challenges for the Future
Jack Dongarra, University of Tennessee Knoxville & Oak Ridge National Laboratory USA

10:30 – 10:45
Break

10:45 – 11:30
Exascale Challenges in Computational Genomics
Rick Stevens, University of Chicago & Argonne National Laboratory, USA

11:30 – 12:15
Toward Exascale Seismic Imaging: Taming Workflow and I/O Issues
Jeroen Tromp, Princeton University, USA

12:15 – 13:15
Lunch

SESSION: EXASCALE & APPLICATIONS II | Chair: Yuefan Deng

13:15 – 13:55
Exascale Dream in Fusion Energy Dream
Choong-Seock Chang, KAIST, South Korea & Princeton University, USA

13:55 – 14:15
Breaking the Simulation/Analysis Chain
Michael Bussmann, Axel Huebl and René Widera, Helmholtz-Zentrum Dresden-Rossendorf, Germany
Felix Schmitt, NVIDIA, USA
Sebastian Grottel, Technische Universität Dresden, Germany
Norbert Podhorszki and Dave Pugmire, Oak Ridge National Laboratory, USA
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA

14:15 – 14:35
Creating Skeletons for Task-Based Scientific Workflows
Jeremy Logan, University of Tennessee Knoxville, USA
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA
Norbert Podhorszki, Oak Ridge National Laboratory, USA
Lizhe Wang, Chinese Academy of Sciences, China
Wei Xue, Tsinghua University, China

14:35 – 14:55
Multi-Component Modeling with Swift at Extreme Scale
Daniel S. Katz, Justin Wozniak, Michael Wilde and Ian Foster, University of Chicago & Argonne National Laboratory, USA

14:55 – 15:10
Break

SESSION: EXASCALE & APPLICATIONS III Chair: Thomas Sterling

15:10 – 15:50
A Sustainable Model for Scientific Simulation Beyond the Exascale
Robert Harrison, Stony Brook University & Brookhaven National Laboratory, USA

15:50 – 16:20
InfiniBand at the Extreme Scale
Richard Graham, Mellanox Technologies, USA

16:20 – 16:40
A Data-Driven Approach to Data-Intensive Astronomy on HPC Clusters
Chen Wu, Andreas Wicenec and Kevin Vinsen, The University of Western Australia, Australia
Ruonan Wang, International Centre for Radio Astronomy Research & The University of Western Australia

16:40 – 17:00
Multigrid at Scale
Mark Ainsworth, Brown University, USA

17:00 – 17:20
Scalable Multilevel Stokes Solver for Mantle Convection Problems
Björn Gmeiner and Ulrich Ruede, University Erlangen-Nuremberg, Germany

17:20 – 17:40
Multi-scale Supercomputing for Virtual Process Engineering
Wei Ge, Chinese Academy of Sciences, China

17:40 – 18:00
Multi-Paradigm Simulation at Nanoscale: Methodology and Application to Functional Carbon Material
Haibin Su, Nanyang Technological University, Singapore

08:00 – 08:30
Registration & Welcome Coffee

SESSION: SOFTWARE ECOSYSTEMS | Chair: David Kahaner

08:30 – 09:15
Pioneering at the Frontiers of Exascale Computing and Beyond
Thomas Sterling, CREST, Indiana University, USA

09:15 – 10:00
Creating a Software Ecosystem for Data Intensive Science
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA

10:00 – 10:30
An Autonomic Performance Environment for Exascale
Kevin Huck, Nicholas Chaimov and Allen Malony, University of Oregon, USA
Allan Porterfield and Robert Fowler, Renaissance Computing Institute, USA
Harmut Kaiser, Louisiana State University, USA
Thomas Sterling, Indiana University, USA

10:30 – 10:45
Break

10:45 – 11:15
Big Data Challenges in Simulation-based Science
Manish Parashar, Rutgers University, USA

SESSION: WORKFLOWS & I/O | Chair: Manish Parashar

11:20 – 11:50
Challenges of Managing Scientific Workflows in High-Throughput and High-Performance Computing Environments
Ewa Deelman, University of Southern California, USA

11:50 – 12:20
A Maturing Role of Workflows in the Presence of Heterogenous Computing Architectures
Ilkay Altintas, University of California, San Diego, USA

12:20 – 13:20
Lunch

13:20 – 13:50
ADIOS Query Interface Design
Drew A. Boyuka, Xiaocheng Zou and Nagiza Samatova, North Carolina State University, USA
Junmin Gu and Kesheng Wu, Lawrence Berkeley National Laboratory, USA
Norbert Podhorszki, Oak Ridge National Laboratory, USA
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA

13:50 – 14:10
SideIO: A Side I/O Framework System for Eliminating Analysis Data Migration
Dan Huang, Jiangling Yin, Jun Wang, Xuhong Zhang and Jian Zhou, University of Central Florida, USA
Qing Liu, Oak Ridge National Laboratory, USA

14:10 – 14:30
Sebo: Selective Bulk Analysis Optimization in Big Data Processing
Jiangling Yin and Jun Wang, University of Central Florida, USA

14:30 – 15:00
ICEE: Enabling Data Stream Processing For Remote Data Analysis Over Wide Area Networks
Jong Choi, Yuan Tian, Gary Liu, Norbert Podhorszki and David Pugmire, Oak Ridge National Laboratory, USA
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA
Eun-Kyu Byun and Soonwook Hwang, Korea Institute of Science & Technology (KISTI),
Korea Alex Sim, Lingfei Wu, and John Wu, Lawrence Berkeley National Laboratory, USA
Mehmet Aktas and Manish Parashar, Rutgers University, USA
Michael Churchill and C.S. Chang, Princeton Plasma Physics Laboratory, USA
Tahsin Kurc, Stony Brook University, USA
Xinyan Yan and Matthew Wolf, Georgia Tech University, USA

15:00 – 15:15
Break

SESSION: INTERCONNECTS | Chair: Ewa Deelman

15:15 – 15:45
An HPC Interconnect with Functions, Features and Opportunities
Ulrich Bruening, University of Heidelberg, Germany

15:45 – 16:10
Creating Interconnect Topologies for Big Data and Exascale Era: MDO and SMOD Algorithms
Marek Michalewicz and Lukasz Orlowski, A*STAR Computational Resource Centre, Singapore
Yuefan Deng, Stony Brook University, USA & A*STAR Computational Resource Centre, Singapore

16:10- 16:35
Group Theory for Design of Network Topologies for Supercomputers
Alexandre Ferreira Ramos, University of São Paolo, Brazil

SESSION: ACCELERATED COMPUTING | Chair: To be confirmed

16:40 – 16:55
A Case for Embedded FPGA-based SoCs for Energy-Efficient Acceleration of Graph Problems
Pradeep Moorthy, Siddhartha and Nachiket Kapre, Nanyang Technological University, Singapore

16:55 – 17:10
Scale-Free Sparse Matrix-Vector Multiplication on Accelerators
Wai Teng Tang, Mian Lu, Huynh Phung Huynh and Rick Siow Mong Goh, Institute of High Performance Computing, A*STAR, Singapore

17:10 – 17:25
CUDA Capable GPU Based Near Real-time Processing for an Underwater Acoustic Video Camera
Mandar Chitre, Anshu Singh and Venugopal Pallayil, Acoustic Research Laboratory, Tropical Marine Science Institute, National University of Singapore
Manu Ignatius, Subnero Pte. Ltd.

Conference Dinner at The Ballroom of Faber Peak Singapore
6:30pm – 9:30pm

08:00 – 08:30
Registration & Welcome Coffee

SESSION: EXASCALE SYSTEMS | Chair: Jack Dongarra

08:30 – 09:10
Architecture for Exascale & Beyond
Alan Gara and Amrita Lokre, Intel, USA

09:10 – 09:50
TSUBAME3.0 towards 4.0 and Issues Toward Convergence of Extreme Computing and Big Data Centers
Satoshi Matsuoka, Tokyo Institute of Technology, Japan

09:50 – 10:30
High-Performance or High-Productivity, Can We Have Both?
Thomas Schulthess, ETH Zürich, Switzerland

10:30 – 10:45
Break

SESSION: ENERGY & EFFICIENCY OF OPERATIONS | Chair: Ulrich Brüning

10:45 – 11:05
Ensuring Efficiency of Exascale Supercomputer Centers
Vladimir Voevodin and Vadim Voevodin, Research Computing Center, Moscow State University, Russia

11:05 – 11:25
Driving Energy Efficient Supercomputing
Natalie Bates, Chair, Energy Efficient HPC Working Group

11:25 – 11:45
The L-CSC Cluster: Greenest Supercomputer in the World in Green500 List of November 2014
David Rohr, Gvozden Neskovic, Mathias Radtke and Volker Lindenstruth, Frankfurt Institute for Advanced Studies, Germany

11:45 – 12:05
Roadmap Towards Ultimately-Efficient Zeta-Scale Data Centers
Bruno Michel, Matteo Cossale, Ronald Luijten, Stefan Paredes and Ingmar Meijer, IBM Research Zurich, Switzerland

12:05 – 12:25
Next-Generation Data Center Design and Management: Green and Efficient Data Centers
Bob Shatten and Eric Grunebaum, TeraCool LLC, USA

12:25 – 12:45
Energy Aware Scheduling on BlueWonder
Luigi Brochard, Lenovo, France
Vadim Elisseev, IBM, Canada
Neil Morgan, Science & Technology Facilities Council, United Kingdom

12:45 – 13:45
Lunch

SESSION: VISUALISATION | Chair: Robert Harrison

13:45 – 14:05
Data-driven Computational Modelling of Large Multi-scale Populations with Intrinsic Structures
Marek Niezgódka, University of Warsaw, Poland

14:05 – 14:25
Large-Scale Scientific Visualization for Today and Tomorrow
Kenneth Moreland, Sandia National Laboratories, USA
Presented on behalf of Kenneth Moreland by Hank Childs

14:25 – 14:45
Data Exploration at the Exascale
Hank Childs, University of Oregon, USA

14:45 – 15:05
PIC Live: Real-time Interactive Programming in Scientific Simulation
Ben Swift and Henry Gardner, Australian National University, Australia
Andrew Sorensen, Queensland University of Technology, Australia
Viktor Decyk, University of California, Los Angeles, USA

15:05 – 15:25
Towards Programming for Multi-level Locality Using a Data-oriented PGAS Approach
Karl Fuerlinger, Ludwig Maximilian University of Munich, Germany

15:25 – 15:40
Break

SESSION: INFINICORTEX | Chair: Satoshi Matsuoka

15:40 – 16:00
InfiniCortex: A Path to Reach Exascale Concurrent Supercomputing Across the Globe Utilising Trans-continental InfiniBand and Galaxy of Supercomputers
Tin Wee Tan, Dominic Siu Hung Chien, Seng Lim, Sing-Wu Liou, Jonathan Low, Marek Michalewicz, Gabriel Noaje, Yves Poppe and Geok Lian Tan, A*STAR Computational Resource Centre, Singapore
Yuefan Deng, Stony Brook University, USA & A*STAR Computational Resource Centre, Singapore

16:00 – 16:15
InfiniCloud: Leveraging Global InfiniCortex Fabric and OpenStack Cloud for Borderless High Performance Computing of Genomic Data and Beyond
Jakub Chrzeszczyk, Andrew Howard and Dongyang Li, National Computational Infrastructure, Australia
Kenneth Ban and Tin Wee Tan, A*STAR Computational Resource Centre, Singapore

16:15 – 16:30
Leveraging RDMA to Enable Big Data Performance on Cloud
Tong Liu, HPC Advisory Council, China

16:30 – 16:45
Performance Assessment of InfiniBand HPC Cloud Instances on Intel Haswell and Intel Sandy Bridge Architectures
Jonathan Low, A*STAR Computational Resource Centre, Singapore
Jakub Chrzeszczyk and Andrew Howard, National Computational Infrastructure, Australia
Andrzej Chrzeszczyk, Jan Kochanowski University, Poland

16:45 – 17:05
TCP Based Data Staging on Supercomputers
Yaxiong Liang, Xu Ji and Wei Xue, Tsinghua University, China
Hoang Bui and Manish Parashar, Rutgers University, USA
Jeremy Logan, Oak Ridge National Laboratory, USA
Lizhe Wang, Chinese Academy of Sciences, China
Scott Klasky, Georgia Tech University & University of Tennessee Knoxville, USA

17:05 – 17:20
Reverse Engineering Password Hashes using ACRC’s Aurora SMP System
Aditi Agarwal, National University of Singapore
Murali Srirangam Ramanujam and Krishnan S. P. T., Institute for Infocomm Research, A*STAR, Singapore

17:20 – 17:35
Panel Session
Chaired by Marek Michalewicz

17:35 – 17:45
Closing Remarks
Tin Wee Tan, Chairman, A*STAR Computational Resource Centre, Singapore

SCF2015 Workshops offer attendees a variety of short courses on key topics and technologies relevant to high performance computing, programming, debugging & novel architectures.  These workshops also provide the opportunity to interact with recognised leaders in the field and to learn about the latest technology trends, theory, and practical techniques.

Our workshops are open to all conference attendees except those who are on 1-Day passes but registrations for the workshops are required. For those of you who are only interested in attending the workshops but not the conference from 17 – 19 March 2015, we have introduced a special workshop-only fee of SG$100. Please check out the details on our registration page.

Please note:
The conference workshops will be held on Friday, 20 March 2015.

Monte Carlo Methods and High-Performance Computing

Time:
9:00am – 5:00pm

Venue:
Creation Theatrette, Level 4, Matrix Building, Biopolis

Breaks:
Morning & afternoon tea breaks and lunch

Presenter:
Michael Mascagni, Florida State University & National Institute of Standards and Technology, USA

Abstract:
The modern development of Monte Carlo methods (MCMs) coincides with the modern development of digital computation and high-performance computing (HPC). This was due to the intrinsic ease of implementation and execution of MCMs on HPC platforms. This close relationship persisted through the introduction of multiple processing elements, vectorizing hardware, Single Instruction Multiple Data (SIMD) hardware, Multiple Instruction Multiple Data (MIMD) and into the modern architectural era with multicore hardware and hybrid architectures that include GPGPUs. This course introduces the students to modern MCMs, which are now essential in many fields, including nanomaterials, financial engineering, computational physics, structural biology, and scientific computing. The algorithmic presentation stresses ways of identifying and exploiting the ample parallelism in these naturally parallel numerical techniques. In addition, an overview of modern HPC hardware and future trends in HPC is presented, and this material is likewise filtered through MCM implementation.

Micron’s Automata Processor: A Massively Parallel Computing Solution

Time:
9:00am – 3:00pm

Venue:
Level 4, Matrix Building, Biopolis

Breaks:
Morning tea break and lunch

Presenter:
Terry Leslie, Director of Business Development, Automata Processing Team, Micron Technology
Matt Tanner, Senior Applications Engineer, Advanced Computing Solutions Group, Micron Technology

Abstract:
Many of today’s most challenging computer science problems – such as those involving very large data structures, unstructured data, random access or real-time performance requirements – require highly parallel solutions. The current implementation of parallelism can be cumbersome and complex, challenging the capabilities of traditional CPU and memory system architectures and often requiring significant effort on the part of programmers and system designers.

For the past seven years, Micron Technology has been developing a hardware co-processor technology that can directly implement large-scale Non-deterministic Finite Automata (NFA) for efficient parallel execution. This new non-Von Neumann processor, currently in fabrication, borrows from the architecture of memory systems to achieve massive data parallelism, addressing complex problems in an efficient, manageable method.

This workshop will provide an overview on this revolutionary new technology, the growing ecosystem, as well as potential applications such as bioinformatics, video and image analysis and cyber security.

An Introduction to Xeon Phi programming and sharing a Numerical Library developer’s experience using the Xeon and Xeon Phi.

Time:
9:00am – 1:00pm

Venue:
Level 4, Matrix Building, Biopolis

Breaks:
Morning tea break and lunch

Presenter:
Brian Spector, Technical Consultant, The Numerical Algorithms Group (NAG)

Abstract:
This 1/2 day workshop introduces parallel program development for the Intel Xeon Phi coprocessor using basic OpenMP. It will discuss the architecture of the system and teach an introduction to developing parallel applications (with OpenMP) targeting the Xeon Phi using both its native and offload modes of execution.

We start by introducing the basics of x86 architecture and extending this description into more specific details of the Intel Xeon Phi architecture. We then present some of the basics of OpenMP and Intel’s Language Extensions for Offload (LEO) — Intel’s compiler directives for using the Xeon Phi alongside the host system. Important topics discussed include data offloading, code profilers, and vectorization. Finally, we demonstrate using the NAG SMP Library for Xeon Phi and show examples of performance gains and pitfalls while coding on the Phi.

Application Programming for Efficiency on Parallel Supercomputers

Time:
9:00am – 5:00pm

Venue:
Level 4, Matrix Building, Biopolis

Breaks:
Morning & afternoon tea breaks and lunch

Presenter:
Zaphiris Christidis, Senior IT Architect, Lenovo Inc.

Abstract:
This workshop includes a tutorial in efficient FORTRAN programming on XEON processors. Various single core optimization techniques in programming are examined and several examples are presented. In turn, principles of shared memory programming using OpenMP, and distributed memory programming using MPI are described and several examples from real application programs are given.

From High Performance Computing to High Efficiency Computing with Allinea

Time:
9:00am – 1:00pm

Venue:
Level 4, Matrix Building, Biopolis

Breaks:
Morning tea break and lunch

Presenter:
Patrick Wohlschlegel, Technical Services Manager, Allinea

Abstract:
Allinea is an HPC software tools company whose tools are widely used in the biggest supercomputing centers worldwide, including A*STAR. Allinea endeavors to help scientists resolve challenging issues at all stages in their applications life-cycle. In the development stage, Allinea Forge – the well established development environment that includes Allinea DDT and Allinea MAP – provides unique capabilities to help debug and optimize HPC applications. Later during production, Allinea Performance Reports has proved to be invaluable to understand complex workloads and increase the efficiency of Supercomputers.

During this hands-on workshop, Allinea will provide you with an introduction to Allinea Forge and Allinea Performance Reports. Through various exercises, we will see how to develop and run high quality and efficient codes.

GPU Programming Workshop with Use Cases in Deep Learning, IVA and Autonomous Driving

Time:
9:00am – 5:00pm

Venue:
Level 4, Matrix Building, Biopolis

Breaks:
Morning & afternoon tea breaks and lunch

Presenter:
Sanjiv Satoor, CUDA Performance Analysis Tools Manager, NVIDIA

Abstract:
The GPU has propelled computer graphics from a feature into an ever-expanding industry — encompassing scientific research, supercomputing, and product design among many other categories. GPUs are now driving new fields like deep learning (the use of sophisticated, multi-level “deep” neural networks to create systems that can perform feature detection from massive amounts of unlabeled training data), computer vision, image processing and augmented reality.

This workshop will show how other scientists and industry professionals are advancing their work in the field of machine learning, Intelligent Video Analytics (IVA), autonomous driving, and provide information about GPU programming tools, software frameworks, and computing configurations that will help you get started.

Sanjiv will discuss where GPU acceleration fits in the context of deep learning, IVA and autonomous driving use cases. He will cover what’s latest in hardware and software, GPU and CUDA roadmap, and how to get started with GPU programming. Workshop will feature hands-on GPU programming session (laptop and headphones are required).