SUPERCOMPUTING FRONTIERS 2016
MARCH 15 – 18, 2016
Singapore
Singapore
The conference programme for SCF2016 is now ready. You may scroll through our online programme or download a pdf version for your reference.
Day 1 | Tuesday, 15 March 2016 |
|
08:00 – 09:00 |
Registration & Welcome Coffee |
OPENING | Chair: Tan Tin Wee |
|
09:00 – 09:05 |
Opening Remarks Marek Michalewicz, A*STAR |
09:05 – 9:20
|
Welcome Address Dr. Raj Thampuran, Managing Director, Agency for Science, Technology & Research (A*STAR), Singapore |
09:20 – 9:40 |
National Supercomputing Centre Singapore MOU Ceremony National Supercomputing Centre Singapore |
EXASCALE | Chair: Tan Tin Wee |
|
09:40 -10:25 |
Keynote | Supercomputers and Superintelligence Horst Simon, Lawrence Berkeley National Laboratory, USA |
10:25 – 10:45 |
Break |
APPLICATIONS | Chair: Chee Yeow Meng |
|
10:45 – 11:15 |
The Potential for Exascale to Transform Healthcare Patricia Kovatch, Icahn School of Medicine, Mount Sinai Hospital, USA |
11:15 – 11:45 |
Petascale Simulations of Microfluidics at Cell Resolution Diego Rossinelli, ETH Zurich, Switzerland |
11:45 – 12:05 |
An Urgent Computing Framework for Ensembles of Forecasts on HPC Infrastructure Siew Hoon Leong & Dieter Kranzmüller, Leibniz Supercomputing Centre / Ludwig Maximilians University Munich, Germany |
12:05 – 12:25 |
Transient Climate Impacts for Scenarios of Aerosol Emissions from Asia: A Story of Coal vs. Gas Benjamin Grandey & Haiwen Cheng, Singapore-MIT Alliance for Research and Technology, Singapore |
12:25 – 13:25 |
Lunch |
APPLICATIONS & LANGUAGES | Chair: Wong Weng Fai |
|
13:25 – 13:55 |
Why Now Is The Best Time To Adopt Julia Alan Edelman, Massachusetts Institute of Technology, USA |
EXASCALE STORAGE & FILE SYSTEMS | Chair: Wong Weng Fai |
|
13:55 – 14:25 |
Exascale I/O : Burst Buffer and Beyond Jean-Thomas Acquaviva, DataDirect Networks, France |
14:25 – 14:45 |
Zero Copy Architecture and File Systems Future Robert Mollard , SGI, Australia |
14:45 – 15:05 |
Providing Low-overhead Data Consistency in Emerging Non-volatile Jun Yang, Data Storage Institute, A*STAR, Singapore |
15:05 – 15:25 |
Exascale Storage Systems the Sirius Way Scott Klasky, Hasan Abbasi, Qing Gary Liu, Jong Choi, Norbert Podhorszki & Feiyi Wang, Oak Ridge National Laboratory, USA |
15:25 – 15:45 |
Break |
VISUALISATION & APPLICATIONS | Chair: Marian Vajtersic |
|
15:45 – 16:05 |
Visualization Plugins using VTKm for In-Transit Visualization with ADIOS Dave Pugmire, Jeremy Meredith, Scott Klasky, Jong Choi & Norbert Podhorszki, Oak Ridge National Laboratory, USA |
APPLICATIONS | Chair: Marian Vajtersic |
|
16:05 – 16:25 |
MateriApps – A Portal to Materials Science Simulation Synge Todo, Ryo Igarashi, Shunsuke Kasamatsu, Takeko Kato, Naoki Kawashima, Yusuke Konishi, Hikaru Kouta, Kazuyoshi Yoshimi, University of Tokyo, Japan |
16:25 – 16:40 |
Super-scalable CFD solver HiFUN on IISc Petaflop system N. Balakrishnan, Indian Institute of Science, India |
16:40 – 16:55 |
Large Eddy Simulation of Gas Fluidized Beds Jingrong Liang & Eldin Wee Chuan Lim, National |
16:55 – 17:10 |
Computational Fluid Dynamics Study of Heat Transfer in Gas Fluidized Beds through Immersed Tubes Zhongyuan Hau & Eldin Wee Chuan Lim, National University of Singapore, Singapore |
COUNTRY REPORTS | Chair: David Kahaner |
|
17:10 – 17:25 |
Update on Indian National Supercomputing Mission Rajat Moona, Centre for Development of Advanced Computing, India |
17:25 – 17:40 |
Japanese HPCI, High Performance Computer Infrastructure, Past, Present and Future, for Open Science and Open Innovation Motoi Okuda, Research Organisation for Information Science & Technology, Japan |
17:40 – 17:55 |
40 Years of Supercomputers in China Meng Guo, National Supercomputer Center in Jinan, China |
17:55 – 18:10 |
National Supercomputing Centre: the future of HPC in Singapore Jon Lau, National Supercomputing Centre, Singapore |
END OF DAY 1 |
Day 2 | Wednesday, 16 March 2016 |
|
08:00 – 09:00 |
Registration & Welcome Coffee |
BRAIN, A.I. & SUPERCOMPUTING | Chair: Horst Simon |
|
09:00 – 10:00 |
Keynote | Could A Brain Ever Have A Mind? Baroness Susan Greenfield, Oxford University, United Kingdom |
10:00 – 10:30 |
From Supercomputing to Superintelligence Roman Yampolskiy, University of Louisville, USA |
10:30 – 10:50 |
Break |
EXASCALE & LANGUAGES | Chair: Marek Niezgódka |
|
10:50 – 11:35 |
Keynote | Sequoia to Sierra: The LLNL Strategy Bronis R. de Supinski, Lawrence Livermore National Laboratory, USA |
11:35 – 12:05 |
Exascale Programming Models: Where Are We Now? Barbara Chapman, Stony Brook University, USA |
12:05 – 12:35 |
In the Zone: HPC with Extempore Andrew Sorenson, The Australian National University, Australia |
12:35 – 13:35 |
Lunch |
LANGUAGES | Chair: Patricia Kovatch |
|
13:35 – 13:55 |
PCJ – A Java Library for Scalable Heterogenous Parallel Computing Marek Nowicki, Łukasz Górski & Magdalena Ryczkowska, Nicolaus Copernicus University, Poland |
13:55 – 14:35 |
Panel Discussion | The Brain in Silicon? John Gustafson (Moderator), Baroness Susan Greenfield, Bronis de Supinski, Roman Yampolskiy, Barbara Chapman, Andrew Sorenson & Horst Simon |
INTERCONNECTS & TOPOLOGIES | Chair: Bronis de Supinski |
|
14:35 – 14:55 |
A Dynamic Congestion Management System for InfiniBand Networks Fabrice Mizero & Malathi Veeraraghavan, University of Virginia, USA |
14:55 – 15:15 |
Strategies for Topology Aware Job Mapping and Scheduling in Multidimensional Torus-based Petascale Systems Jarek Nabrzyski & Kangkang Li, University of Notre Dame, USA |
SYSTEM MONITORING | Chair: Bronis de Supinski |
|
15:15 – 15:35 |
Making Large-Scale Systems Observable — Another Inescapable Step Towards Exascale Dmitry Nikitenko, Sergey Zhumatiy & Pavel Shvets, Lomonosov Moscow State University, Russia |
15:35 – 15:55 |
Break |
INFINICORTEX | Chair: Robert Harrison |
|
15:55 – 16:15 |
Around The Globe Towards Exascale: InfiniCortex – Past and Present Gabriel Noaje, A*STAR Computational Resource Centre, Singapore |
16:15 – 16:45 |
How Can We Bridge Supercomputing, Next Generation Networks, Big Data and Applications? Krzysztof Kurowski, Poznań Supercomputing and Networking Center, Poland |
16:45 – 17:05 |
The Role of Standards in Supercomputing David Southwell, Obsidian Strategics, Canada |
17:05 – 17:35 |
InfiniCloud 2.0: Distributing High Performance Computing Across Continents Jakub Chrzeszczyk, Andrew Howard, The Australian National University, Australia |
18:00 – 21:30 |
Conference Dinner at 1-Altitude |
END OF DAY 2 |
Day 3 | Thursday, 17 March 2016 |
|
08:00 – 09:00 |
Registration & Welcome Coffee |
NEW PROCESSOR ARCHITECTURE | Chair: Srinivas Aluru |
|
09:00 – 09:45 |
A Radical Approach to Computation with Real Numbers John Gustafson, A*STAR Computational Resource Centre, Singapore |
09:45 – 10:15 |
A New Processor Architecture for Exascale and Beyond Thomas Sohmers, Rex Computing, USA |
10:15 – 10:35 |
Break |
NEW PROCESSOR ARCHITECTURE | Chair: John Gustafson |
|
10:35 – 11:05 |
The Last Computing Frontier: Quantum Computing Vern Brownell, D-Wave Systems Inc., Canada |
11:05 – 11:35 |
Tables, Graphs, and Problems John Feo, Pacific Northwest National Laboratory & University of Washington, USA |
11:35 – 12:05 |
TrueNorth, A Low-Power Bio-inspired Neurosynaptic Architecture for Sensory Processing Garrick Orchard, National University of Singapore, Singapore |
12:05 – 13:05 |
Lunch |
AUTOMATA PROCESSOR | Chair: Barbara Chapman |
|
13:05 – 13:50 |
Keynote | Automata Processing: A New Paradigm for Computing Srinivas Aluru, Georgia Institute of Technology, USA |
13:50 – 14:15 |
Pushing the Frontiers of Supercomputing with Automata Computing Mircea Stan, University of Virginia, USA |
14:15 – 14:30 |
VASim: An Open Virtual Automata Simulator for Automata Processing Research Jack Wadden and Kevin Skadron, University of Virginia, USA |
14:30 – 14:45 |
Parallel Interval Stabbing on the Automata Processor Indranil Roy & Matt Grimm, Micron Technology, Inc., USA |
14:45 – 15:00 |
Accelerating Weeder: A DNA Motif Search Tool using the Micron Automata Processor Qiong Wang, National University of Defense Technology, China Jack Wadden, University of Virginia, USA |
15:00 – 15:20 |
Break |
MANY-CORE | Chair: He Bing Sheng |
|
15:20 – 15:50 |
What Have We Learned About Heterogeneous Supercomputing? Wen-mei Hwu, University of Illinois Urbana-Champaign, USA |
15:50 – 16:20 |
Application Readiness for the Pre-Exascale HPC Phase Stan Posey, NVIDIA Corporation, USA |
16:20 – 16:50 |
Many-Core Approaches to Combinatorial Problems Michael Krajecki, Julien Loiseau, Christophe Jaillet, Francois Alin & Arnaud Renard, University of Reims Champagne-Ardenne, CReSTIC, France |
16:50 – 17:10 |
Elastic Stencil Code for Cloud-based GPU Spot Instances Jun Zhou, Yan |
17:10 – 17:25 |
Break |
AUTOMATA PROCESSOR | Chair: Mircea Stan |
|
17:25 – 18:25 |
Panel Discussion | Special Session to Engage Community Input for an Automata Computing Community Infrastructure Mircea Stan (Moderator), Jack Wadden & Audience |
18:25 – 18:30 |
Closing Remarks Marek Michalewicz, A*STAR Computational Resource Centre |
END OF DAY 3 |
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenters:
Pradeep Kumar Gupta, Lead HPC & Deep Learning Solutions Architect, NVIDIA, APJ
Gabriel Noaje, Senior Computational Scientist, A*STAR Computational Resource Centre
Abstract:
Learn how to program GPUs. With millions of GPU compute enabled GPUs sold to date, software developers, scientists and researchers are finding broad-ranging uses for GPU computing.
Get hands-on practice with OpenACC. OpenACC allows programmers to use simple compiler directives to identify which areas of code to accelerate, without requiring modification to the underlying code itself.
In this interactive class we will also introduce the rapidly developing technology of Deep Learning accelerated by GPUs. Recent advances in Deep Learning have led to a step change in performance in a number of machine perception tasks including visual perception, speech recognition and natural language understanding after decades of slow progress in these areas. We will tour the most popular software frameworks for Deep Learning with goal of helping you decide which framework best suits your application needs as a researcher or developer.
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenter:
Matt Grimm, Automata Processor Applications Engineer, Micron Technology
Indranil Roy, Automata Processor Software Development Architect, Micron Technology
Terry Leslie, Director of Automata Processor Business Development, Micron Technology
Jack Wadden, University of Virginia
Mircea Stan, University of Virginia
Abstract:
This will be a full day workshop, starting in the morning with a brief discussion of concepts and foundational principles. This will incorporate live demonstrations of automata running on hardware. The foundational section will end with a demonstration of Protomata, a protein motif search application. The foundational discussion will be followed by a theoretical discussion of automata processing and mapping various problems into the AP paradigm. Specific applications and research projects will be discussed where the automata processor shows promise. There will also be a discussion of the AP cluster installation at the Center for Automata Processing at the University of Virginia.
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenters:
Norishige (Noly) Morimoto, Vice-President & Chief Technology Officer, IBM Asia Pacific
Ganesan Narayanasamy, OpenPOWER leader in Education and Research, IBM India
H. Peter Hofstee, Research Member, IBM Austin Research Laboratory
Abstract:
OpenPOWER Workshop to provide latest updates on various Industry based applications.
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenter:
Robert Stober, Director of Systems Solution Architects, Bright Computing
Abstract:
Containerisation and private clouds are gaining popularity in HPC environments. Through this workshop, participants will have the opportunity to learn first hand how to deploy, manage and monitor Docker containers using Bright Cluster Manager. In addition, participants will have hands on experience to deploy an Openstack private cloud “from scratch” using Bright Openstack.
Important notes:
(a) This workshop is limited to 20 participants only.
(b) Participants are required to bring their own laptop.
(c) Prior to the workshop participants should install the Bright Cluster Manager front end client CMGUI for Bright Cluster Manager 7.2 from the here. For help in installing CMGUI, refer to the manual Bright 7.2 Admin Manual excerpt – CMGUI.
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning tea break and lunch
Presenter:
Rajesh Chhabra, Vice President APAC – Enterprise Computing, Altair
Srirangam Srirangarajan, Managing Director – Altair Engineering Sdn Bhd.
Abstract:
Engineering is one of the most dynamic sector today. Rapidly changing demands – both in manpower and computing resources – make it also one of the most suitable for leveraging the Cloud. The need to collaborate across the globe with multi-disciplinary experts leveraging the best of the breed engineering applications is an absolute necessity.
These computation intensive engineering applications inturn depend on High Performance Computing (HPC) for quicker turnaround times. Faster turnarounds lead to faster collaboration which in turn would mean faster decision making.
Cloud computing’s unique ability to allow multiple collaborators to work on the same data models improves technical efficiency, data security and reduces potential errors due to miscommunication which in-turn reduces costs and improves overall efficiency.
This workshop is designed for Engineering R&D Heads, Engineering Leads, Product Design specialists and HPC infrastructure providers (technical + management). The workshop will showcase the Cloud solutions for organisations wanting to provide any software as a service and key engineering applications from Altair to enable breakthrough engineering for the modern era using HPC on Cloud.
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenter:
Mukesh Gangadhar, Senior Application Engineer, Intel
Abstract:
Hardware technologies in High Performance Computing are continuously undergoing major changes and rapidly increasing performance capabilities, but the software and the underlying code legacy is often left unchanged or even neglected. This leads to performance gaps and underutilized hardware assets.
In this workshop, gain insights into cutting-edge programming techniques and tools required to achieve the highest performance on Intel® Architecture using C/C++ or Fortran. Also, learn how to write code in order to maximize software performance on current and future Intel® Xeon and Xeon Phi processors (including Broadwell and Knights Landing).
Time:
9:00am – 1:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning tea break and lunch
Presenter:
Stan Posey, HPC Program Manager, NVIDIA USA
Abstract:
Current trends in high performance computing have advanced towards the use of graphics processing units (GPUs) to achieve accelerator speed-ups for numerical operations common among HPC applications, across a range of computational scientific and engineering domains.
In recent years, this trend has led to GPUs becoming mainstream processors for acceleration of industry-leading commercial CAE software from ISVs such as ANSYS, SIMULIA, and other vendors, and for widely used community developed software including OpenFOAM, WRF, COSMO, and several others.
This session will examine:
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenter:
Viral Shah, Co-inventor of Julia, Co-founder of Julia Computing
Abstract:
Julia is a high-level, high-performance, open source programming language for technical computing. It provides a sophisticated compiler, distributed parallel execution, numerical accuracy, and an extensive mathematical function library. Julia’s Base library, largely written in Julia itself, also integrates mature, best-of-breed open source C and Fortran libraries for linear algebra, random number generation, signal processing, and string processing. In addition, the Julia developer community is contributing a number of external packages through Julia’s built-in package manager at a rapid pace. IJulia, a collaboration between the Jupyter and Julia communities, provides a powerful browser-based graphical notebook interface to Julia.
This workshop will start with a basic introduction to Julia. It will then cover topics related to key scientific libraries (array manipulation, linear algebra, sparse matrices, FFTs, etc.). The participants will also learn how to write high performance Julia code, and what makes Julia so fast. Towards the end, we will discuss parallelism, multi-threading, and Julia on GPUs. In the second half, participants may translate their existing programs to Julia or work on an exercise to practise their julia skills.
See: http://www.julialang.org/
Time:
9:00am – 5:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning & afternoon tea breaks and lunch
Presenter:
Dr. Vincent Chai, Technical Sales Consultant
Abstract:
In this workshop, participants will be able to experience the power and scalability of ANSYS computational fluid dynamics (CFD) solutions when paired with ANSYS HPC tools for various industry problems. In the recent release, ANSYS CFD with HPC was shown to scale from 768 cores to over 129,000 cores at 90% efficiency when solving complex fluid dynamic problems.
This workshop will go through different case studies with various applications for different industrial applications such as data centre cooling, multiphase analysis, turbomachinery studies and more.
Time:
9:00am – 1:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Morning tea break and lunch
Presenter:
Hari Hara, Application Engineer
Abstract:
In this workshop, participants will be able to experience the power of ANSYS HPC, parametric analysis and optimisation tools for mechanical design and simulation.
With ANSYS finite element analysis (FEA) tools, you can simulate real world behaviour of components and sub-systems. The ability to customize, automate and parameterize your simulations to analyse multiple design scenarios, allows you to test different design variations quickly and accurately. High-performance computing (HPC) adds tremendous value to engineering simulation by enabling the creation of large, high-fidelity models that yield accurate and detailed insight into the performance of a proposed design, predicting the actual performance of the product under real-world conditions.
Time:
2:00pm – 6:00pm
Venue:
Level 4, Matrix Building, Biopolis
Breaks:
Afternoon tea break
Presenter:
Dr. Boyu Zheng, Technical Manager
Abstract:
Modern electronics industry requires innovative approaches to design higher-speed, higher-throughput, better power efficiency and smaller form-factor electronics systems. As we are entering the era of Internet of Things (IoT), wireless communication and networking becomes equally important with the focus on wireless connectivity, antenna design, and electromagnetic interference and compatibility (EMI/EMC) issues. These systems are usually large and complex, therefore a lot of challenges are encountered during the stages of design and optimization.
ANSYS high-fidelity electromagnetic simulation software is ideal for identifying electromagnetic issues early in the design cycle. For example, the software enables engineers to do design space exploration to quickly identify the ideal solution for antenna design and placement. With HPC and ANSYS electromagnetics solution, engineers can effectively increase system performance and product reliability while reducing field failures.
In this workshop, participants will have the opportunity to understand the workflow of applying ANSYS electromagnetics solution to tackle real-world challenges in large and complex systems. There will also be hands-on sessions for participants to test out ANSYS and feel the solving capability with HPC.